20 annunci per il ruolo di ingegnere - broni, lom (recruiting in corso)

Design Enablement Manager - EDA
FONDAZIONE CHIPS-IT —Pavia, Lombardia
- 25.000 € - 55.000 € all'anno
- Dottorato di ricerca
- Laurea magistrale
- Ingegneria elettrica
Proposal & Project Manager
De Lama —San Martino Siccomario, Lombardia
- AutoCAD
- Ingegneria
- Inglese
Software Development - PLC Automazione
FEDEGARI —Albuzzano, Lombardia
- Tempo pieno
- Inglese
- PLC
- Leadership
Candidatura rapida
Principal Physical Digital Design Engineer
FONDAZIONE CHIPS-IT —Pavia, Lombardia
- 25.000 € - 55.000 € all'anno
- Dottorato di ricerca
- Laurea magistrale
- Ingegneria elettrica
Technical Writer Specialist - Validazione Farmaceutica
FEDEGARI —Albuzzano, Lombardia
- Tempo pieno
- Inglese
- Laurea magistrale
- Competenze analitiche
Candidatura rapida
Progettista Meccanico Senior
De Lama —San Martino Siccomario, Lombardia
- AutoCAD
- Inglese
- Competenze analitiche
Lead of Microelectronics Design Center EDA Support Group
FONDAZIONE CHIPS-IT —Pavia, Lombardia
- 25.000 € - 55.000 € all'anno
- Dottorato di ricerca
- Laurea magistrale
- Ingegneria elettrica
Project Planner
ISS International SpA —Pavia, Lombardia
- 25.000 € - 27.000 € all'anno
- Tempo pieno
- Microsoft Excel
- Inglese
- Microsoft Office
CORTEOLONA PRODUCTION PLANNING INTERN
Lactalis Italia Srl —Genzone, Lombardia
- Microsoft Excel
- Inglese
- Microsoft Office
Candidatura rapida
TIROCINANTE UFFICIO ORGANIZZAZIONE, IT E PRIVACY PAVIA (PV)
ALDIA COOPERATIVA SOCIALE —Pavia, Lombardia
- 1.000 € al mese
- Tempo pieno
- Competenze organizzative
Candidatura rapida
Design Verification Engineer SoC
FONDAZIONE CHIPS-IT —Pavia, Lombardia
- 25.000 € - 55.000 € all'anno
- Dottorato di ricerca
- Laurea magistrale
- Ingegneria elettrica
Firmware Engineering Intern
Marvell —Pavia, Lombardia
- 21.250 € - 28.750 € all'anno
- Tempo pieno
- Informatica
- Inglese
- Laurea magistrale
PLC Automation Engineer
De Lama —San Martino Siccomario, Lombardia
- Informatica
- Inglese
- PLC
Analog Layout Manager
Marvell —Pavia, Lombardia
- 55.300 € - 73.700 € all'anno
- Tempo pieno
- Gestionale
- Inglese
Operations Coordinator Automotive
Autohero —Voghera, Lombardia
- 0 € all'anno
- Tempo pieno
- Competenze organizzative
- Produzione
- Capacità di comunicazione
Candidatura rapida
IT Service Management Support Engineer | Space
Etinars —Pavia, Lombardia
- Gestionale
- Inglese
- Competenze analitiche
Candidatura rapida
Digital Design Engineer - Junior/Senior
Inventvm Semiconductor —Pavia, Lombardia
- Tempo pieno
- Dottorato di ricerca
- Ingegneria
- Inglese
Senior Staff Application Engineer
Marvell —Pavia, Lombardia
- 48.800 € - 65.000 € all'anno
- Tempo pieno
- Oracle
- Dottorato di ricerca
- Inglese
Silicon Validation Engineer Junior/Intern
Marvell —Pavia, Lombardia
- 21.250 € - 28.750 € all'anno
- Tempo pieno
- Informatica
- Inglese
- Laurea magistrale
Tecnico campionatore
Studio Zaneboni —San Colombano al Lambro, Lombardia
- Tempo pieno
- Microsoft Word
- AutoCAD
- Microsoft Excel

Voglio ricevere gli ultimi avvisi Job Alert per il ruolo di ingegnere nella seguente località: broni, lom

Accedendo al tuo account, accetti i Termini di Servizio di SimplyHired e acconsenti alle nostre Norme sui Cookie e sulla Privacy.

Design Enablement Manager - EDA

FONDAZIONE CHIPS-IT
Pavia, Lombardia

Candidati adesso

Dettagli della posizione

25.000 € - 55.000 € all'anno

Qualifiche

Dottorato di ricerca
Laurea magistrale
SoC
Ingegneria elettrica
Italiano

Descrizione completa della posizione

About Fondazione Chips-IT

The Foundation “Italian Center for the Design of Semiconductor Integrated Circuits,” also known as the Chips-IT Foundation, is a nonprofit research and technology organization under the supervision of the Ministries of Industry.

The Foundation is Italy's first RTO (Research and Technology Organization) vertically focused on semiconductor research and stands as a center of excellence in frontier research on semiconductor design, as well as a pivotal center of the Italian semiconductor ecosystem and expertise.

Missions of the Foundation:

Promote the design and development of integrated circuits
Strengthen the system of professional training in the field of microelectronics
Ensure the establishment of a network of universities, research centers and enterprises that fosters innovation and technology transfer in the field

Posizione:

The Chips-IT Foundation is seeking a senior professional to lead and support the activities of its Microelectronics Design Center. This role is central to ensuring the efficiency, reliability, and continuous evolution of design tools, laboratory infrastructure, and the overall R&D environment for advanced System-on-Chip (SoC) development. The Lead of Microelectronics Design Center EDA Support Group will be responsible for the maintenance, optimization, and governance of Electronic Design Automation (EDA) flows, Process Design Kits (PDKs). This position serves as a technical focal point for microelectronics design infrastructure, coordinating interactions with foundries, and EDA vendors, while enabling seamless SoC design from concept through tape-out.

The work can be carried out either in Pavia or in Bologna.

KEY RESPONSIBILITIES:

Coordinate with vendors for EDA tool procurement, licensing, and maintenance contracts.
Maintain and optimize EDA toolchains for digital design, including simulation, synthesis, verification, and physical design.
Manage PDK installations and updates, acting as the technical liaison with foundries for issue resolution and continuous support.
Maintain, calibrate, and troubleshoot HW Emulators, ensuring uninterrupted research and pre-silicon verification activities.
Enable seamless integration of PDKs into EDA workflows, supporting the full SoC design lifecycle from concept to tape-out.
Ensure accurate and up-to-date documentation of tool installations, maintenance procedures, and best practices for EDA flows and laboratory equipment.

Requisiti:

Master’s degree in Electrical Engineering, Computer Engineering, or a closely related field with a focus on EDA tools, PDKs, or semiconductor processes.
Proven experience in maintaining EDA tools and managing PDKs (Cadence, Synopsys, Siemens).
Strong understanding of semiconductor fabrication processes, including interactions with foundries.
Familiarity with hardware description languages (Verilog, VHDL), digital and analog design workflows.
Tape-out experience with advanced process nodes (16nm and below).

Altre informazioni:

WHAT WE OFFER:

Competitive compensation and contract type, to be negotiated based on qualifications and experience
Possibility to enter into a PhD conjugating your job with a research program that will grant you the PhD title.
Lunch tickets
Private health care coverage depending on your role and contract
Structured growth path, with ongoing access to training and updates
Networking opportunities with industry-leading professionals
International environment
Hybrid work policy
Tax deductions: Candidates from abroad, comprising Italian citizens, who have carried scientific research activity abroad and meet specific requirements, may be entitled to a taxable income deduction up to 90% for a period of 6 to 13 years

In conformità con le normative vigenti, il range retributivo lordo annuo previsto per questa posizione è compreso tra Euro 25.000,00 e 55.000,00. L'ampiezza del range è finalizzata a valutare candidature con diversi livelli di seniority; l'offerta finale sarà strettamente commisurata all'effettiva esperienza e alle competenze del candidato, e sarà integrata dai benefit aziendali previsti per il ruolo.

Candidati adesso

Perfeziona la tua ricerca

ingegnere offerte - broni, lom

Design Enablement Manager - EDA

Proposal & Project Manager

Software Development - PLC Automazione

Principal Physical Digital Design Engineer

Technical Writer Specialist - Validazione Farmaceutica

Progettista Meccanico Senior

Lead of Microelectronics Design Center EDA Support Group

Project Planner

CORTEOLONA PRODUCTION PLANNING INTERN

TIROCINANTE UFFICIO ORGANIZZAZIONE, IT E PRIVACY PAVIA (PV)

Design Verification Engineer SoC

Firmware Engineering Intern

PLC Automation Engineer

Analog Layout Manager

Operations Coordinator Automotive

IT Service Management Support Engineer | Space

Digital Design Engineer - Junior/Senior

Senior Staff Application Engineer

Silicon Validation Engineer Junior/Intern

Tecnico campionatore

Voglio ricevere gli ultimi avvisi Job Alert per il ruolo di ingegnere nella seguente località: broni, lom

Related Searches

Posizione:

Requisiti:

Altre informazioni:

Strumenti per chi cerca lavoro

Strumenti Aziende

Visualizza

Resta in contatto