2 annunci per il ruolo di architetto - dolzago, lom (recruiting in corso)

Senior CMOS analog/mixed signal design Engineer
Ferroelectric Memory GmbH —Agrate Brianza, Lombardia
- Tempo pieno
- Inglese
- Ingegneria elettrica
Candidatura rapida
Senior Digital IC Design Engineer
Ferroelectric Memory GmbH —Agrate Brianza, Lombardia
- Tempo pieno
- Inglese
- Ingegneria elettrica
Candidatura rapida

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Senior CMOS analog/mixed signal design Engineer

Ferroelectric Memory GmbH
Agrate Brianza, Lombardia

Candidatura rapida

Dettagli della posizione

Tempo pieno

Qualifiche

Inglese
Ingegneria elettrica

Descrizione completa della posizione

Role Overview

We are looking for an experienced IC Design Engineer with strong expertise in CMOS analog/mixed‑signal design and emerging NVM devices to help develop FMC’s next‑generation ferroelectric memory products based on hafnium oxide technology. You will work in close collaboration with international teams in Milan or Dresden to turn innovative memory concepts into robust silicon.

Must Have

CMOS IC design (Analog/Mixed Signal), NVM Device Design, Design tools: Cadence, Verilog, Programming Ability: C, Verilog, Digital Design Concepts

Responsibilities

Design and develop emerging NVM memory devices based on hafnium oxide technology for FMC’s ferroelectric memory product portfolio.
Define specifications and support the integration of analog and mixed‑signal blocks into the overall memory architecture.
Design analog circuits for NVM memories (sense amplifiers, decoders, bandgaps, HV regulators, ADCs, etc.).
Run PVT simulations and circuit verification, including parasitic extraction, to ensure performance and reliability.
Collaborate closely with layout engineers to optimize robustness, matching, and area.
Contribute to post‑silicon verification, debug, and optimization of memory IP and test chips.

Your profile

5-10 Years of experience and a Degree in Electrical Engineering or related field.
Strong background in CMOS IC design (analog/mixed signal) and NVM device design.
Hands‑on experience with Cadence design environment and Verilog for modeling or verification.
Familiarity with standard design and simulation flows (e.g., Cadence DFII, Virtuoso, Spice, Verilog‑A).
Relevant experience in analog/mixed‑signal CMOS and memory/NVM design.
Good knowledge of CMOS device physics and circuit behavior over PVT.
Strong problem‑solving skills and ability to work effectively in cross‑functional teams.
Fluent in English.

About us

Ferroelectric Memory GmbH (FMC) is a pioneering semiconductor company based in Dresden, Germany, focused on next-generation non-volatile memory technology.
Founded in 2016, FMC is at the forefront of innovation in ferroelectric memory, enabling faster, more energy-efficient, and scalable solutions for future computing systems.

Our team combines deep expertise in semiconductor physics, device engineering, and system design to redefine memory architectures for emerging applications in AI, IoT, and high-performance computing.

Join us and be part of a team shaping the future of memory technology.

Why FMC?

Cutting-edge memory technology
Strong presence in the Dresden semiconductor ecosystem
High ownership and impact-driven roles
International and collaborative team
Direct contribution to AI and next-generation computing

Candidatura rapida

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architetto offerte - dolzago, lom

Senior CMOS analog/mixed signal design Engineer

Senior Digital IC Design Engineer

More jobs to discover

Voglio ricevere gli ultimi avvisi Job Alert per il ruolo di architetto nella seguente località: dolzago, lom

Role Overview

Must Have

Responsibilities

Your profile

About us

Why FMC?

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